Writing a Really Tiny RISC-V Emulator

It makes sense that you would be a RISC giver rather than a risk taker. 🙂Thanks for sharing.

So cool, the whole thing fits the L1 cache of a modern processor with lines and lines to spare 😎

Nice work! A fun step with emulators is adding in a gdb server/hooks so you can debug your emulated processor with breakpoints and watched variables just like on real hardware.

maybe you don't want to put a red line at the bottom of the thumbnail as some people may think that they already watched the video

So happy you are back and working on stuff that I'm also interested in!

I learnt a lot with this video, thanks for sharing. Hope you'll continue this project and make other cool stuff with it !

I understand the whole being excited about a project… reach a monumental milestone and then hit the unsure if you will continue or quit while ahead haha. This is great work and you are very inspiring!!! I hope your curiosity continues to fuel your excitement for this project. Where this goes will be a great adventure. Keep up the awesome content! I have a feeling your channel is on the cusp of massive growth! Again great job!

Great project! love your videos, I hope you have more time to do them next year!

This has helped me in planning my discrete TTL risc-v cpu. Thanks for posting

Great video, as always. And I know that the ESP32 isn't the only place this could be useful, but you can absolutely boot noMMU Linux natively on an ESP32 with external PSRAM! I've got a kernel+buildroot setup that boots successfully in QEMU!

Nice one! Thanks for sharing, there's a lot of cool stuff to learn from this... cheers!

Nice to see come back with such beautiful way.

Thumbs up for putting it together .. 👍🏼👍🏼

It's funny how many times I have rediscovered your channel learning about unrelated interesting things.

Dude, nice work on this!

Yay new upload!

This is cool. I'm working on a very similar project for a RISC-V emulator, intended to be run as a sandbox inside of other applications. It'll be my second go at writing an emulated CPU. My first one used a made up machine instruction set, and I programmed in machine code by hand. When I paid attention to the RISC-V, I saw that my project was similar in may ways. In this second attempt, I am focused minimizing resources and and maximizing speed. After looking into other emulator projects, including yours, I see that the footprint is likely to be smaller than I anticipated.

That is so awesome! This really encourages me to try to implement Linux on my RV32 system as well! (I'm not sure Its doable, but we'll see :))

solid work

Great video